The following issues were found
drivers/clk/qcom/gcc-ipq806x.c
1 issues
Line: 2296
};
static struct clk_dyn_rcg gmac_core1_src = {
.ns_reg[0] = 0x3cac,
.ns_reg[1] = 0x3cb0,
.md_reg[0] = 0x3ca4,
.md_reg[1] = 0x3ca8,
.bank_reg = 0x3ca0,
.mn[0] = {
Reported by Cppcheck.
drivers/clk/qcom/mmcc-msm8960.c
1 issues
Line: 802
};
static struct clk_dyn_rcg gfx2d0_src = {
.ns_reg[0] = 0x0070,
.ns_reg[1] = 0x0070,
.md_reg[0] = 0x0064,
.md_reg[1] = 0x0068,
.bank_reg = 0x0060,
.mn[0] = {
Reported by Cppcheck.
drivers/clk/renesas/clk-mstp.c
1 issues
Line: 228
Column: 18
CWE codes:
126
/* Skip clocks with no name. */
ret = of_property_read_string_index(np, "clock-output-names",
i, &name);
if (ret < 0 || strlen(name) == 0)
continue;
parent_name = of_clk_get_parent_name(np, i);
ret = of_property_read_u32_index(np, idxname, i, &clkidx);
if (parent_name == NULL || ret < 0)
Reported by FlawFinder.
drivers/clk/renesas/r9a06g032-clocks.c
1 issues
Line: 763
Column: 8
CWE codes:
119
120
Suggestion:
Perform bounds checking, use functions that limit length, or ensure that the size is larger than the maximum possible length
struct clk *clk;
struct r9a06g032_clk_bitsel *g;
struct clk_init_data init = {};
const char *names[2];
/* allocate the gate */
g = kzalloc(sizeof(*g), GFP_KERNEL);
if (!g)
return NULL;
Reported by FlawFinder.
drivers/clk/renesas/renesas-cpg-mssr.c
1 issues
Line: 569
Column: 2
CWE codes:
120
Suggestion:
Make sure destination can always hold the source data
return -ENOMEM;
pd->num_core_pm_clks = num_core_pm_clks;
memcpy(pd->core_pm_clks, core_pm_clks, pm_size);
genpd = &pd->genpd;
genpd->name = np->name;
genpd->flags = GENPD_FLAG_PM_CLK | GENPD_FLAG_ALWAYS_ON |
GENPD_FLAG_ACTIVE_WAKEUP;
Reported by FlawFinder.
drivers/clk/rockchip/clk-px30.c
1 issues
Line: 127
};
static const struct rockchip_cpuclk_reg_data px30_cpuclk_data = {
.core_reg[0] = PX30_CLKSEL_CON(0),
.div_core_shift[0] = 0,
.div_core_mask[0] = 0xf,
.num_cores = 1,
.mux_core_alt = 1,
.mux_core_main = 0,
Reported by Cppcheck.
drivers/clk/rockchip/clk-rk3036.c
1 issues
Line: 105
};
static const struct rockchip_cpuclk_reg_data rk3036_cpuclk_data = {
.core_reg[0] = RK2928_CLKSEL_CON(0),
.div_core_shift[0] = 0,
.div_core_mask[0] = 0x1f,
.num_cores = 1,
.mux_core_alt = 1,
.mux_core_main = 0,
Reported by Cppcheck.
drivers/clk/rockchip/clk-rk3128.c
1 issues
Line: 120
};
static const struct rockchip_cpuclk_reg_data rk3128_cpuclk_data = {
.core_reg[0] = RK2928_CLKSEL_CON(0),
.div_core_shift[0] = 0,
.div_core_mask[0] = 0x1f,
.num_cores = 1,
.mux_core_alt = 1,
.mux_core_main = 0,
Reported by Cppcheck.
drivers/clk/rockchip/clk-rk3188.c
1 issues
Line: 148
};
static const struct rockchip_cpuclk_reg_data rk3066_cpuclk_data = {
.core_reg[0] = RK2928_CLKSEL_CON(0),
.div_core_shift[0] = 0,
.div_core_mask[0] = 0x1f,
.num_cores = 1,
.mux_core_alt = 1,
.mux_core_main = 0,
Reported by Cppcheck.
drivers/clk/rockchip/clk-rk3228.c
1 issues
Line: 122
};
static const struct rockchip_cpuclk_reg_data rk3228_cpuclk_data = {
.core_reg[0] = RK2928_CLKSEL_CON(0),
.div_core_shift[0] = 0,
.div_core_mask[0] = 0x1f,
.num_cores = 1,
.mux_core_alt = 1,
.mux_core_main = 0,
Reported by Cppcheck.